Most of the modern communication protocols use some error detection
algorithms. Cyclic Redundancy Check, or CRC, is the most popular one
among these. CRC properties are defined by the generator polynomial
length and coefficients. The protocol specification usually defines CRC
in hex or polynomial notation. For example, CRC-8 used in ATM HEC field
is represented as 0x07 in hex notation or as G(X)=X^8 + X^2 + X^1 +1. in
the polynomial notation.The code given below is capable of computing
,CRC-8 for 32 bit input.The module need 32 clock cycles for the
computation.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity crc32_8 is
port ( clk : in std_logic;
data_in : in std_logic_vector(31 downto 0);
crcout : out std_logic_vector(7 downto 0)
);
end crc32_8;
architecture Behavioral of crc32_8 is
signal crc_temp : std_logic_vector(7 downto 0) := "00000000";
signal counter1 : std_logic_vector(5 downto 0):="000000";
signal dtemp : std_logic_vector(31 downto 0):=(others => '0');
begin
dtemp <= data_in;
process(data_in,clk)
begin
if(data_in /= "00000000000000000000000000000000") then
if(clk'event and clk='1') then
--CRC calculation. Function used is : X^8 + X^2 + X^1 +1.
--Edit the next 8 lines to compute a different CRC function.
crc_temp(0) <= data_in(31-conv_integer(counter1(4 downto 0))) xor crc_temp(7);
crc_temp(1) <= data_in(31-conv_integer(counter1(4 downto 0))) xor crc_temp(7) xor crc_temp(0);
crc_temp(2) <= data_in(31-conv_integer(counter1(4 downto 0))) xor crc_temp(7) xor crc_temp(1);
crc_temp(3) <= crc_temp(2);
crc_temp(4) <= crc_temp(3);
crc_temp(5) <= crc_temp(4);
crc_temp(6) <= crc_temp(5);
crc_temp(7) <= crc_temp(6);
--CRC calculation is finished here.
--counter increment.
counter1 <= counter1 + '1';
end if;
if(counter1 ="100000") then --counter for doing the CRC operation for 8 times.
crcout <= crc_temp;
crc_temp <="00000000";
counter1 <= "000000";
else
crcout <= "00000000"; --CRC output is zero during idle time.
end if;
else
--CRC output is zero when input is not given or input is zero
crcout <= "00000000";
crc_temp <="00000000";
counter1 <= "000000";
end if;
end process;
end Behavioral;
When the input is zero or not given the output stays at zero.This module can be edited to calculate other CRC functions and for different input lengths.If you require program for a different CRC function leave a comment here.I will try to post the code as soon as possible.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity crc32_8 is
port ( clk : in std_logic;
data_in : in std_logic_vector(31 downto 0);
crcout : out std_logic_vector(7 downto 0)
);
end crc32_8;
architecture Behavioral of crc32_8 is
signal crc_temp : std_logic_vector(7 downto 0) := "00000000";
signal counter1 : std_logic_vector(5 downto 0):="000000";
signal dtemp : std_logic_vector(31 downto 0):=(others => '0');
begin
dtemp <= data_in;
process(data_in,clk)
begin
if(data_in /= "00000000000000000000000000000000") then
if(clk'event and clk='1') then
--CRC calculation. Function used is : X^8 + X^2 + X^1 +1.
--Edit the next 8 lines to compute a different CRC function.
crc_temp(0) <= data_in(31-conv_integer(counter1(4 downto 0))) xor crc_temp(7);
crc_temp(1) <= data_in(31-conv_integer(counter1(4 downto 0))) xor crc_temp(7) xor crc_temp(0);
crc_temp(2) <= data_in(31-conv_integer(counter1(4 downto 0))) xor crc_temp(7) xor crc_temp(1);
crc_temp(3) <= crc_temp(2);
crc_temp(4) <= crc_temp(3);
crc_temp(5) <= crc_temp(4);
crc_temp(6) <= crc_temp(5);
crc_temp(7) <= crc_temp(6);
--CRC calculation is finished here.
--counter increment.
counter1 <= counter1 + '1';
end if;
if(counter1 ="100000") then --counter for doing the CRC operation for 8 times.
crcout <= crc_temp;
crc_temp <="00000000";
counter1 <= "000000";
else
crcout <= "00000000"; --CRC output is zero during idle time.
end if;
else
--CRC output is zero when input is not given or input is zero
crcout <= "00000000";
crc_temp <="00000000";
counter1 <= "000000";
end if;
end process;
end Behavioral;
When the input is zero or not given the output stays at zero.This module can be edited to calculate other CRC functions and for different input lengths.If you require program for a different CRC function leave a comment here.I will try to post the code as soon as possible.
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