1. What is the difference between a latch and a flip flop. For the same
input, how would the output look for a latch and for a flip-flop.
2. Finite state machines:
(2.1)Design a state-machine (or draw a state-diagram) to give an output '1' when the # of A's are even and # of B's are odd. The input is in the form of a serial-stream (one-bit per clock cycle). The inputs could be of the type A, B or C. At any given clock cycle, the output is a '1', provided the # of A's are even and # of B's are odd. At any given clock cycle, the output is a '0', if the above condition is not satisfied.
(2.2). To detect the sequence "abca" when the inputs can be a b c d.
3. minimize a boolean expression.
4. Draw transistor level nand gate.
5. Draw the cross-section of a CMOS inverter.
6. Deriving the vectors for the stuck at 0 and stuck at 1 faults.
7. Given a boolean expression he asked me to implement just with muxes but nothing else.
8. Draw Id Vds curves for mosfets and explain different regions.
9. Given the transfer characteristics of a black box draw the circuit for the black box.
10. Given a circuit and its inputs draw the outputs exact to the timing.
11. Given an inverter with a particular timing derive an inverter using the previous one but with the required timing other than the previous one.
12. Change the rise time and fall time of a given circuit by not changing the transistor sizes but by using current mirrors. 13. Some problems on clamping diodes.
1. He asked me to draw the cross section of an inverter and asked me
to show all the capacitances on it and reason for those capacitances.
2. what is pipelining?
3. what are superscalar machines and vliw machines?
4. what is cache?
5. what is cache coherency and how is it eliminated?
6. what is write back and write through caches?
7. what are different pipelining hazards and how are they eliminated.
8. what are different stages of a pipe?
9. eplain more about branch prediction in controlling the control hazards
10. Give examples of data hazards with pseudo codes.
11. Caluculating the number of sets given its way and size in a cache?
12. How is a block found in a cache?
13. scoreboard analysis.
14. What is miss penalty and give your own ideas to eliminate it.
15. How do you improve the cache performance.
16. Different addressing modes.
17. Computer arithmetic with two's complements.
18. About hardware and software interrupts.
19. What is bus contention and how do you eliminate it.
20. What is aliasing?
21) What is the difference between a latch and a flip flop?
22) What is the race around condition? How can it be overcome?
23) What is the purpose of cache? How is it used?
24) What are the types of memory management
2. Finite state machines:
(2.1)Design a state-machine (or draw a state-diagram) to give an output '1' when the # of A's are even and # of B's are odd. The input is in the form of a serial-stream (one-bit per clock cycle). The inputs could be of the type A, B or C. At any given clock cycle, the output is a '1', provided the # of A's are even and # of B's are odd. At any given clock cycle, the output is a '0', if the above condition is not satisfied.
(2.2). To detect the sequence "abca" when the inputs can be a b c d.
3. minimize a boolean expression.
4. Draw transistor level nand gate.
5. Draw the cross-section of a CMOS inverter.
6. Deriving the vectors for the stuck at 0 and stuck at 1 faults.
7. Given a boolean expression he asked me to implement just with muxes but nothing else.
8. Draw Id Vds curves for mosfets and explain different regions.
9. Given the transfer characteristics of a black box draw the circuit for the black box.
10. Given a circuit and its inputs draw the outputs exact to the timing.
11. Given an inverter with a particular timing derive an inverter using the previous one but with the required timing other than the previous one.
12. Change the rise time and fall time of a given circuit by not changing the transistor sizes but by using current mirrors. 13. Some problems on clamping diodes.
These are some of the questions asked by Microsoft.
(I feel that these type of questions are asked even in Electrical Engineering interviews. Make sure you browse them.)
(I feel that these type of questions are asked even in Electrical Engineering interviews. Make sure you browse them.)
1.
Given a rectangular (cuboidal for the puritans) cake with a rectangular
piece removed (any size or orientation), how would you cut the
remainder of the cake into two equal halves with one straight cut of a
knife ?
2. You're given an array
containing both positive and negative integers and required to find the
sub-array with the largest sum (O(N) a la KBL).
Write a routine in C for the above.
Write a routine in C for the above.
3.
Given an array of size N in which every number is between 1 and N,
determine if there are any duplicates in it. You are allowed to destroy
the array if you like.
4. Write a routine to draw a circle (x ** 2 + y ** 2 = r ** 2) without making use of any floating point computations at all.
5. Given only putchar (no sprintf, itoa, etc.) write a routine putlon the prints out an unsigned long in decimal.
6. Give a one-line C expression to test whether a number is a power of 2. [No loops allowed - it's a simple test.]
7. Given an array of characters which form a sentence of words, give an
efficient algorithm to reverse the order of the words (no characters)
in it.
8. How many points are
there on the globe where by walking one mile south, one mile east and
one mile north you reach the place where you started.
9. Give a very good method to count the number of ones in a 32 bit
number. (caution: looping through testing each bit is not a solution)
10. What are the different ways to say, the value of x can be either a 0
or a 1. Apparently the if then else solution has a jump when written
out in assembly.
if (x == 0)
y=0
else
y =x
if (x == 0)
y=0
else
y =x
There is a logical, arithmetic and a datastructure soln to the above
problem.
problem.
Logic design:
1. Draw the transistor level CMOS #input NAND or NOR gate.After drawing it lot of qestions on that ckt will be asked.
2. Transistor sizing for given rise time and fall time. How do you size it for equal rise and fall time.
3. Given a function whose inputs are dependent on its outputs. Design a sequential circuit.
4. Design a finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1.
5. Given a boolean equation minimize it.
6. Given a boolean equation draw the transistor level minimum transistor circuit.
7. What is the function of a D-flipflop, whose inverted outputs are connected to its input ?
8. What will you do if you want to drive a large capacitance ?
Layout related questions:
1. asked me to layout the 3 input nand gate.
2. Later he asked me to modify it to consume as much less space as
we can.
we can.
3. He also asked me about the transistor sizing.
1. He asked me to draw the cross section of an inverter and asked me
to show all the capacitances on it and reason for those capacitances.
2. Describe the latchup effect.
3. More about the tristate buffers.
3. What will be the voltage at the output node of a triostate buffer
in its high impedence state. He gave a waveform for the input and
asked me to draw the output waveform for that.
in its high impedence state. He gave a waveform for the input and
asked me to draw the output waveform for that.
4. Posed a lot of questions on charge sharing problems and keeper
circuits.
circuits.
5. Asked me to draw the Id Vds curves for mosfet. Asked me to
explain the regions and some couses for that curve like channel
width modulation.
explain the regions and some couses for that curve like channel
width modulation.
6. He asked me about the electron migration effect and methods to
avoid it.
avoid it.
7. Asked me to draw the dynamic logic of a particular gate and then
posed lots of tricky questions from the previous discussion.
posed lots of tricky questions from the previous discussion.
8. He asked me to draw the 6 transistor contemporary sram cell and asked
me to explain how the reading and writing is done in it.
me to explain how the reading and writing is done in it.
9. Something about trip point.
Computer Architecture Questions:
1. Explain what is DMA?2. what is pipelining?
3. what are superscalar machines and vliw machines?
4. what is cache?
5. what is cache coherency and how is it eliminated?
6. what is write back and write through caches?
7. what are different pipelining hazards and how are they eliminated.
8. what are different stages of a pipe?
9. eplain more about branch prediction in controlling the control hazards
10. Give examples of data hazards with pseudo codes.
11. Caluculating the number of sets given its way and size in a cache?
12. How is a block found in a cache?
13. scoreboard analysis.
14. What is miss penalty and give your own ideas to eliminate it.
15. How do you improve the cache performance.
16. Different addressing modes.
17. Computer arithmetic with two's complements.
18. About hardware and software interrupts.
19. What is bus contention and how do you eliminate it.
20. What is aliasing?
21) What is the difference between a latch and a flip flop?
22) What is the race around condition? How can it be overcome?
23) What is the purpose of cache? How is it used?
24) What are the types of memory management
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